The present invention relates to a PLL (phase locked loop) circuit which includes a VCO (voltage-controlled oscillator) having a plurality of oscillation frequency bands and multiplies the frequency of an input signal into a desired value to output the obtained desired value, and relates to a technique for effectively reducing the time required to detect, from the plurality of oscillation frequency bands, an optimum oscillation frequency band corresponding to a predetermined PLL oscillation frequency.
A PLL circuit is typically a circuit which compares the phases of two signals (i.e., a reference signal fref as a standard of comparison and a PLL frequency-divided signal fdiv obtained by dividing the output frequency of a VCO which oscillates at a frequency corresponding to an input voltage) and varies the control voltage Vt for the VCO in accordance with the magnitude of the phase difference to thereby output a desired oscillation frequency.
For example, a CS tuner (a communication satellite broadcasting receiver), in which the intermediate frequency widely ranges from 950 MHz to 2600 MHz, needs a PLL capable of wideband oscillation. However, with a single VCO, accomplishing such wideband oscillation is difficult, because very high frequency conversion gain is required. Therefore, a method is typically adopted, in which a VCO having a plurality of oscillation frequency bands is used, and switching among the VCO's oscillation frequency bands is done according to a PLL output frequency, thereby achieving wideband oscillation.
A method described in Japanese Laid-Open Publication No. 2004-7433 has been proposed as a method for selecting an optimum oscillation frequency band from a plurality of oscillation frequency bands. This conventional method and configuration will be described below.
FIG. 16 is a block diagram illustrating the minimum configuration of a conventional PLL circuit including a VCO having a plurality of oscillation frequency bands. In FIG. 16, a crystal oscillation signal 16 generated by a crystal oscillator 1 is input to a fixed frequency divider 2, in which the frequency of the crystal oscillation signal 16 is divided by a frequency divisor number. The output signal resulting from the frequency division is a reference signal 11 (fref) in the PLL.
A PLL output signal 14 (fout), which is the output signal of the VCO 10, is output as the output signal of the PLL circuit, while the frequency of the PLL output signal 14 is divided by a frequency divisor number by a variable frequency divider 7 in a later stage, thereby producing a PLL frequency-divided signal 15 (fdiv).
The frequency divisor number N of the variable frequency divider 7, which is determined by the reference signal's frequency and the PLL output signal's frequency, satisfies the following equation.(PLL output signal's frequency)=reference signal's frequency×N 
A phase comparator 5 compares the phase of the input reference signal 11 and that of the input PLL frequency-divided signal 15 and outputs digital phase error signals UP 17 and DOWN 18. According to the digital phase error signals output from the phase comparator 5, a charge pump 6 in the subsequent stage outputs an analog phase difference signal 19 corresponding to the phase difference between the reference signal 11 and the PLL frequency-divided signal 15.
Then, a loop filter 9 in the subsequent stage integrates the input analog phase difference signal 19, thereby producing a phase control signal. This phase control signal becomes a VCO control voltage 20 (Vt), and the PLL output signal 14 corresponding to this control voltage Vt is output from the VCO.
The oscillation frequency bands of a VCO typically have characteristics shown in FIG. 17. As stated above, it is difficult to cover a wide oscillation frequency band by a single band, and a method is thus generally adopted in which a plurality of narrow oscillation frequency bands are superimposed to cover a wide oscillation frequency range.
It is found from FIG. 17 that bands applicable to a predetermined PLL output frequency, i.e., the VCO oscillation frequency, are limited. For example, in FIG. 17, when the PLL circuit is made to oscillate at a frequency F1, no bands except for bands B2 and B3 allow the oscillation at the frequency F1. In addition, since the VCO's oscillation frequency characteristics inevitably change due to disturbances such as temperature variations and voltage variations, the PLL output frequency and a band to be used cannot be determined in advance in a one-to-one correspondence. It is thus necessary to detect an optimum band corresponding to a PLL output frequency each time the PLL circuit is used. This band detection is performed by an oscillation frequency band selection circuit 8. The oscillation frequency band selection circuit 8 compares a count number 21 counted for the reference signal 11 for a specified period of time by a first counter 3, which counts the number of rising edges of the reference signal 11, with a count number 22 counted for the PLL frequency-divided signal 15 for the same period of time by a second counter 4, which counts the number of rising edges of the PLL frequency-divided signal 15. If the count number 22 for the PLL frequency-divided signal 15 is greater than the count number 21 for the reference signal 11, this means that the oscillation frequency in the currently selected band is higher than the predetermined PLL output signal frequency. Thus, a band one oscillation frequency range lower is reselected, and the same frequency comparison is performed. Conversely, if the count number 22 for the PLL frequency-divided signal 15 is smaller than the count number 21 for the reference signal 11, this means that the oscillation frequency in the currently selected band is lower than the predetermined PLL output signal frequency. Thus, a band one oscillation frequency range higher is reselected, and the same frequency comparison is performed. By repeating this frequency comparison, the band closest to the predetermined PLL output signal frequency is finally detected and selected.
During band detection, the VCO control voltage 20 (Vt) is always set to the value of VCO power supply voltage×½(VDDVCO/2) for each band, so that after the completion of the band detection, even if the VCO's oscillation frequency characteristics vary due to disturbances such as temperature variations and voltage variations, a situation in which frequency oscillation using the detected band becomes impossible is prevented as much as possible by comparing the reference frequency with the oscillation frequency obtained in each band when Vt=VDDVCO/2. The foregoing is the operation principle of the PLL circuit according to the conventional technique which includes the VCO having a plurality of oscillation frequency bands.
In this manner, in the conventional method and configuration described above, the frequency counters count, for a specified period of time, the frequency of the reference signal fref in the PLL circuit and the frequency of the PLL frequency-divided signal fdiv, which is obtained by dividing the frequency of a PLL output signal output from the VCO with the variable frequency divider, and these count numbers are compared to determine which is greater and which is smaller. If the comparison result shows that the count number for the reference signal fref is greater than the count number for the PLL frequency-divided signal fdiv, a band one oscillation frequency range higher is selected, and, on the other hand, if the comparison result shows that the count number for the PLL frequency-divided signal fdiv is greater than the count number for the reference signal fref, a band one oscillation frequency range lower is selected. Thereafter, the frequency counters again count the frequency of the reference signal fref and the frequency of the PLL frequency-divided signal fdiv, and a transition to the band one oscillation frequency range higher or lower is made. By repeating this, an oscillation frequency band, in which the frequency count difference between the reference signal fref and the PLL frequency-divided signal fdiv is minimum, is finally detected, and this oscillation frequency band is the optimum oscillation frequency band corresponding to the PLL output frequency.
Nevertheless, the conventional configuration and method, in which the frequency counters count the rising edges of the reference signal fref and of the PLL frequency-divided signal fdiv for a specified period of time, have a problem with a lower accuracy count. Specifically, if there is a rising-edge phase difference between the reference signal fref and the PLL frequency-divided signal fdiv at the time of the start of counting, a maximum error of 1 will occur in the difference between the count numbers for these signals after the specified period of time, and hence the frequency difference between the reference signal fref and the PLL frequency-divided signal fdiv cannot be measured accurately. There is also a problem in that in order to measure the frequency difference accurately, the time in which the counting for the reference signal fref and the PLL frequency-divided signal fdiv is performed must be increased. This problem becomes more serious, as the frequency difference between adjacent bands becomes small.
If the oscillation band detection time is shortened, it is possible to reduce lockup time, which is the time required for the PLL circuit to operate stably at a predetermined frequency from the time at which the PLL circuit starts oscillating. Naturally, the shorter the oscillation band detection time is, the higher the performance of the PLL circuit is. On the other hand, if the oscillation band detection time is increased to improve the accuracy in detecting the optimum oscillation band, a reduction in analog lockup time, caused by the use of an oscillation frequency band unsuitable for the predetermined PLL oscillation frequency, and an increase in the number of frequency components other than the desired frequency are prevented, which also leads to an improvement in the performance of the PLL circuit. That is, there is a trade-off between the oscillation band detection time and the oscillation band detection accuracy.